NT98528芯片规格
Novatek NT98528 is a highly-integrated SoC with high image quality, low bitrate, low power consumption, targets on 4Kp
Novatek NT98528 is a highly-integrated SoC with high image quality, low bitrate, low power
consumption, targets on 4Kp Edge-Computing IP camera application. The SoC integrates ARM Dual
Cortex A9 CPU core, new generation ISP, H.265/H.264 video compression codec, high performance
hardware DLA module, graphic engine, display controller, Ethernet PHY, USB 2.0 Host/Device, audio
codec, RTC and SD/SDIO 3.0 to provide best cost performance Edge-Computing IP camera solution.
◼ High Performance 32-bit CPU
¨ Dual Core ARM® Cortex™ A9
¨ NEON™ and FPU acceleration
¨ 32 KB instruction cache, 32 KB data cache and 256 KB L2 cache
¨ Embedded ICE makes firmware debugging easier
◼ Power Management features
¨ Firmware configurable operating frequency of each functional block to meet best power budget
◼ Integrated Clock Generator
¨ Internal PLL with spread spectrum capability
¨ 12MHz system
¨ 32768Hz RTC oscillator
◼ Scalable Memory Bus Architecture
¨ Two 16-bits DDR3/3L SDRAM interface, supporting up to 4Gb+4Gb
¨ DRAM operating data rate up to DDR3/DDR3L 2133
¨ Sensor Interface Engine
¨ Support high speed serial interface like MIPI(1.5G)/ sub-LVDS /HiSPi(1G) up to 4 channels and 2
clocks for most commercial CMOS sensors including Sony, Panasonic, Onsemi, Samsung, Sharp
and Omnivision, etc.
¨ Support parallel sensor interface for most commercial CMOS sensors including Aptina and
Omnivision
¨ Support max. 2 BT.601/656(8-bit)/BT.1120 video input
¨ Support 12-bit sensor data input
¨ Support 2 HDR sensor composition such as SONY DOL mode and Omnivision staggered mode
¨ Support companding HDR sensor
¨ Built-in color pattern generation
¨ Sensor black level clamping
¨ Efficient defect concealment algorithm
¨ Flexible image analysis flow for AE, AWB and AF purpose
¨ Programmable histogram analysis
¨ In-pipeline color shading compensation technology
¨ Support EIS with gyro-sensor input
¨ Support RGBIr4x4, RCCB format
¨ Support up to 8Mp30 or 240M pixel/sec for typical case
¨ Support up to 8Mp60 or 480M pixel/sec for single sensor HDR case
¨ Support up to 2 HDR sensor with 2 frames each
¨ Support h/w motion detection to wake up system
¨ Support additional digital gain up to 256x
¨ Image Processing Engine
¨ Support up to 8Mp30 or 240M pixel/sec for typical case
¨ Advanced image pipeline architecture for multi-purpose hardware acceleration
¨ Support on-line mode direct from Sensor Interface Engine
¨ Support bayer input compression
¨ Support YUV output compression
¨ Support 2 frames HDR with ghost reduction
¨ Support crop and H/V flip
¨ Support dynamic defect pixel concealment
¨ Powerful temporal and spatial noise reduction technology
¨ In-pipeline lens shading compensation technology
¨ Support radial crop
¨ Wide dynamic range (WDR) for global/local illumination enhancement
¨ Proprietary advanced anti-alias CFA color interpolation for Bayer and RGBIr4x4
¨ False color suppression
¨ In-pipeline geometric distortion correction
¨ In-pipeline color aberration correction
¨ R/G/B Gamma LUT
¨ Advanced edge rendering control and continuity enhancement
¨ Specific color control technology (Patented)
¨ Brightness/contrast and hue/saturation adjustment
¨ High precision color correction matrix for sRGB or specific color requirement
¨ Support defog function
¨ Support purple fringe reduction
¨ Support advanced motion compensated temporal filtering (MCTF) for efficient video noise
reduction
¨ Support local contrast enhancement
¨ Image Manipulation Engine
¨ High quality anti-aliasing scaling engine from 1/16x to 16x
¨ Support 3 sets scaling output
¨ Support 4 sets data stamp
¨ Support 8 sets privacy mask
¨ DLA module
¨ DLA engine with computing power up to 1.5 TOPS
¨ NUE Network utility engine to accelerate pre-processing and classification tasks
¨ NUE2 Network utility engine to accelerate post-processing and classification tasks
¨ Computer Vision Acceleration
¨ IVE General intelligent video analysis operation
¨ DIS Digital image stabilization and object tracking engine
¨ MDBC Motion detection and background construction engine
◼ LCD Display
¨ High performance scaling up/down engine, programmable gamma correction, color transform and
color management for LCD display
¨ Two video windows(YUV422 / YUV420 UVPack)
¨ One OSD windows(8bit palette with alpha plane / ARGB4444 / ARGB1555 / ARGB8565 /
ARGB8888)
¨ Programmable width & height to meet LCD resolution exactly
¨ Support digital LCD for 8bit-Serial-RGB, 6bit-Serial-RGB, 8bit-Serial-YUV, MIPI-DSI
interface(1/2/4 data lane & 1 clock lane)
¨ Support RGB565/RGB666 parallel interface.
¨ Support 16-bit RGB interface.
¨ Support Flip function
¨ Support rectangle about 16 (Face detection rectangle)sets with global alpha
¨ Support output YUV (422/420) data to dram(not including data in video2 path)
¨ Support digital interface
BT.601(CCIR601_8b&CCIR601_16b)/BT.656(CCIR656_8b)/BT.1120(CCIR656_16b) output
port(8bits Double-Data-Rate capable)
¨ 3.3V / 1.8V LCD / Digital video out
¨ Graphic Engine
¨ Geometric operation including mirror, flip and rotation
¨ Arithmetic operation including addition, subtraction, color keying, logic operation and alpha
blending
¨ OSD blending on YUV
¨ RGB invert
¨ Support anti-alias affine transform
¨ True Random Number Generator
¨ Generate true random number
¨ 32-bits Random number generator
¨ Video CODEC
¨ Support H.264/AVC codec BP/MP/HP, level 5.1
¨ Support H.265/HEVC codec MP, level 5.0
¨ Support multi-channel encoding and decoding with performance up to 8-megapixel@30fps
¨ Support picture resolutions up to 5120x5120 Support low latency video encoding and decoding
¨ Support CBR, VBR and Macro block QP table
¨ Support adaptive quantization
¨ Support frame rotation by 90, 180 and 270 degrees
¨ Support ROI (10 sets) enhancing picture quality
¨ Support OSG function
¨ Support video format MP4, AVI, MOV
¨ Support full frame still capture while video recording
◼ F/W Audio CODEC
¨ AAC encode / decode (32KHz, 48KHz @ 192kbps)
¨ ADPCM /G.711 / G.726
¨ AEC / ANR and ALC
◼ H/W Audio CODEC
¨ stereo 16-bits ADC audio recording
¨ stereo 16-bits DAC audio playback (only mono output)
¨ Programmable ALC / Noise Gate (for recording)
¨ Audio sampling rate : 8k, 11.025k, 12k, 16k, 22.05k, 24k, 32k, 44.1k, 48kHz
¨ Support dual microphone inputs
¨ Support 4-channel Digital microphone (MEMS-microphone) inputs
¨ JPEG CODEC
¨ Supports Motion JPEG 5 megapixel@30fps encoding
¨ Max. pixel clock 240Mpixel / sec
¨ Support ISO/IEC 10918-1 baseline JPEG compression/decompression.
¨ Still image maximum resolutions will be up to 65536x65536 pixels
¨ Support input format: 420, 211
¨ Support Encode/Decode mode, rotate 90, 180, 270 degree (only 420 format)
¨ JPEG supports downloadable Quantization and Huffman tables
¨ Support Exchangeable Image File format (EXIF 2.2.3 and newer)
◼ Digital Audio Interface
¨ Support I2S codec interface
¨ Audio clock generator
◼ Dual Graphic-based OSD (OSG)
¨ Support 1/2/4-bit palette and ARGB(1555/4444/8888) & RGB565 format / Color key
¨ Support 2 layers OSD
¨ Fixed OSD layer priority (top to down: OSD1->OSD2->Image)
¨ Support max. size up to 2624x2624(H.264/H.265) per layer(depend on encoder)
¨ Support Codec video encode OSD function
¨ Support up to 16 regions per layer, all regions can’t overlap inside a layer and one macro-block
can’t have two or more regions inside a layer.
¨ Support Pixel alpha (ARGB1555, ARGB4444, ARGB8888 and Palette) and Global alpha
(RGB565)
¨ Support OSD QP
◼ Storage Memory Controller
¨ Secure Digital card and SDIO
¨ Support SD 3.0
¨ Support UHS-I: UHS50 (Max. freq. 96MHz)
¨ Support SPI-NAND and SPI-NOR flash
¨ Support eMMC v4.41 interface
◼ USB
¨ Fully compliant with USB2.0 device/host (1 set)
¨ Support Control / Isochronous / Interrupt and Bulk transfer
¨ Support PC camera mode
◼ Timers
¨ RTC can be powered by separate backup battery and operating from 1.5V to 3.3V
¨ Watch dog timer
¨ 20 programmable HW timers support resolution up to 3MHz and 32 bits counter
◼ Peripheral Interface
¨ Support I2C interface (3 set )
¨ Support 12 channels PWM including built-in 2 (2 sets) pattern generators for µ-Stepping motor
control
¨ Support GPIO and flexible PWM interface with micro-stepping
¨ Support programmable 3-wired serial interface (with DMA transfer)
¨ Support SPI interface (only PIO)
¨ Dedicated SPI for gyroscope reading(only PIO)
¨ Support NFC & BLE4.0 interface
¨ Support UART interface (3 set, 1 with PIO and 2/3 with DMA transfer and support RS485
standard)
¨ Support Remote interface
¨ Support 4 channels of 9-bit ADC, the max. sample rate up to 12.5 KHz per channel(one is
thermal channel)
¨ Embeded Ethernet 10M/100M/1000M MAC and support RMII/RGMII interface. PHY clock output
and TSO/UFO acceleration for reducing CPU usage.
¨ Embedded Ethernet PHY, Fully compliant with 100BASE-TX, and 10BASE-T PMD level
standards (IEEE 802.3, 802.3u)
¨ Embedded temperature sensor for obtaining the internal chip temperature.
◼ On-chip Boot Strap Loader
¨ Built-in on-chip mask ROM
¨ User program can be stored in NAND-type flash and external static memory is not necessary
¨ On-chip mask ROM can be disabled
¨ System can boot from SPI NOR/ NAND flash, memory cards, eMMC, Ethernet
◼ Triple Voltage Power Supply
¨ 0.9V core logic voltage
¨ 1.5V DDR3, 1.35V DDR3L
¨ 3.3V I/O interface and analog circuit voltage
◼ Package
¨ NT98528BG: 361ball HS-TFBGA, 13x13 mm^2
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